Invention Application
- Patent Title: POWER OVERLAY STRUCTURE AND METHOD OF MAKING SAME
- Patent Title (中): 动力覆盖结构及其制造方法
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Application No.: US15363237Application Date: 2016-11-29
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Publication No.: US20170077014A1Publication Date: 2017-03-16
- Inventor: Arun Virupaksha Gowda , Paul Alan McConnelee , Shakti Singh Chauhan
- Applicant: General Electric Company
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
A semiconductor device module includes a dielectric layer, a semiconductor device having a first surface coupled to the dielectric layer, and a conducting shim having a first surface coupled to the dielectric layer. The semiconductor device also includes an electrically conductive heatspreader having a first surface coupled to a second surface of the semiconductor device and a second surface of the conducting shim. A metallization layer is coupled to the first surface of the semiconductor device and the first surface of the conducting shim. The metallization layer extends through the dielectric layer and is electrically connected to the second surface of the semiconductor device by way of the conducting shim and the heatspreader.
Public/Granted literature
- US10186477B2 Power overlay structure and method of making same Public/Granted day:2019-01-22
Information query
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