发明申请
- 专利标题： INTEGRATED CIRCUIT WITH ON-DIE DECOUPLING CAPACITORS
- 专利标题（中）： 集成电路与电路解耦电容器
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申请号： US14467039申请日： 2014-08-24
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公开(公告)号： US20160056099A1公开(公告)日： 2016-02-25
- 发明人: Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- 申请人： Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- 申请人地址： US TX Austin
- 专利权人： Freescale Semiconductor, Inc.
- 当前专利权人： Freescale Semiconductor, Inc.
- 当前专利权人地址： US TX Austin
- 主分类号： H01L23/495
- IPC分类号： H01L23/495 ; H01L21/50
摘要：
A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.
公开/授权文献
- US09418873B2 Integrated circuit with on-die decoupling capacitors 公开/授权日：2016-08-16
信息查询
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