Invention Application
US20160043047A1 Semiconductor Device and Method of Forming Double-Sided Fan-Out Wafer Level Package
审中-公开
半导体器件和双面扇出晶圆级封装的方法
- Patent Title: Semiconductor Device and Method of Forming Double-Sided Fan-Out Wafer Level Package
- Patent Title (中): 半导体器件和双面扇出晶圆级封装的方法
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Application No.: US14814906Application Date: 2015-07-31
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Publication No.: US20160043047A1Publication Date: 2016-02-11
- Inventor: Il Kwon Shim , Pandi C. Marimuthu , Won Kyoung Choi , Sze Ping Goh , Jose A. Caparas
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/498 ; H01L21/56

Abstract:
A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.
Public/Granted literature
- US10453785B2 Semiconductor device and method of forming double-sided fan-out wafer level package Public/Granted day:2019-10-22
Information query
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