发明申请
- 专利标题: Chip on Package Structure and Method
- 专利标题(中): 芯片封装结构和方法
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申请号: US14147316申请日: 2014-01-03
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公开(公告)号: US20150115464A1公开(公告)日: 2015-04-30
- 发明人: Chen-Hua Yu , Der-Chyang Yeh , Kuo-Chung Yee , Jui-Pin Hung
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L21/48 ; H01L23/48
摘要:
A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die.
公开/授权文献
- US09373527B2 Chip on package structure and method 公开/授权日:2016-06-21
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