发明申请
- 专利标题： TECHNIQUES FOR REDUCING INDUCTANCE IN THROUGH-DIE VIAS OF AN ELECTRONIC ASSEMBLY
- 专利标题（中）： 减少电子组装电子电路电感的技术
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申请号： US13611076申请日： 2012-09-12
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公开(公告)号： US20140071652A1公开(公告)日： 2014-03-13
- 发明人: MICHAEL B. MCSHANE , KEVIN J. HESS , PERRY H. PELLEY , TAB A. STEPHENS
- 申请人： MICHAEL B. MCSHANE , KEVIN J. HESS , PERRY H. PELLEY , TAB A. STEPHENS
- 申请人地址： US TX Austin
- 专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人： FREESCALE SEMICONDUCTOR, INC.
- 当前专利权人地址： US TX Austin
- 主分类号： H05K7/00
- IPC分类号： H05K7/00
摘要：
An electronic assembly includes a processor die assembly, a first die assembly, and a second die assembly. The first die assembly is positioned on a first side of the processor die assembly. The second die assembly is positioned on a second side of the processor die assembly opposite the first side of the processor die assembly. Through-die vias couple the first and second die assemblies to the processor die assembly.
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