Provided is an information processor including: an operation unit performing logical operation or arithmetical operation; an execution unit executing predetermined functions based on the operation results; a clock signal generating unit generating a first clock signal to be a reference; a clock signal multiplying unit performing a multiplication operation on the first clock signal to generate a second clock signal; a clock signal selection unit selecting one of the first or second clock signals and supplies the selected signal to the execution unit; a memory storing data for setting the execution unit to be in an executable state in a readable and writable non-volatile memory; and a setting unit setting the execution unit to be in an executable state by causing the clock signal selection unit to select the first clock signal when reset is released and reading the data from the memory to start writing the data.