- 专利标题: NONVOLATILE MEMORY AND ELECTRONIC APPARATUS
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申请号: US13549914申请日: 2012-07-16
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公开(公告)号: US20130037884A1公开(公告)日: 2013-02-14
- 发明人: Shunpei YAMAZAKI , Hisashi OHTANI , Jun KOYAMA , Takeshi FUKUNAGA
- 申请人: Shunpei YAMAZAKI , Hisashi OHTANI , Jun KOYAMA , Takeshi FUKUNAGA
- 申请人地址: JP Atsugi-shi
- 专利权人: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- 当前专利权人: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- 当前专利权人地址: JP Atsugi-shi
- 优先权: JP9-333453 19971118; JP9-337710 19971121; JP9-340754 19971126
- 主分类号: H01L29/786
- IPC分类号: H01L29/786
摘要:
An active region, a source region, and a drain region are formed on a single crystal semiconductor substrate or a single crystal semiconductor thin film. Impurity regions called pinning regions are formed in striped form in the active region so as to reach both of the source region and the drain region. Regions interposed between the pinning regions serve as channel forming regions. A tunnel oxide film, a floating gate, a control gate, etc. are formed on the above structure. The impurity regions prevent a depletion layer from expanding from the source region toward the drain region.
公开/授权文献
- US08482069B2 Nonvolatile memory and electronic apparatus 公开/授权日:2013-07-09
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