发明申请
US20120161992A1 INTEGRATED NON-LINEARITY (INL) AND DIFFERENTIAL NON-LINEARITY (DNL) CORRECTION TECHNIQUES FOR DIGITAL-TO-ANALOG CONVERTERS (DACS)
有权
用于数字到模拟转换器（DACS）的集成非线性（INL）和差分非线性（DNL）校正技术
- 专利标题： INTEGRATED NON-LINEARITY (INL) AND DIFFERENTIAL NON-LINEARITY (DNL) CORRECTION TECHNIQUES FOR DIGITAL-TO-ANALOG CONVERTERS (DACS)
- 专利标题（中）： 用于数字到模拟转换器（DACS）的集成非线性（INL）和差分非线性（DNL）校正技术
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申请号： US13411253申请日： 2012-03-02
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公开(公告)号： US20120161992A1公开(公告)日： 2012-06-28
- 发明人: Iskender Agi
- 申请人： Iskender Agi
- 申请人地址： US CA Milpitas
- 专利权人： INTERSIL AMERICAS INC.
- 当前专利权人： INTERSIL AMERICAS INC.
- 当前专利权人地址： US CA Milpitas
- 主分类号： H03M1/06
- IPC分类号： H03M1/06
摘要：
INL values are determined for sub-segments of a DAC adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the sub-segments of the DAC, and a second set of correction codes that can be used to ensure that all values of DNL>−1 (to ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2̂N possible digital input codes (that can be accepted by the DAC) to more than 2̂N possible digital output codes, to ensure that all values of DNL>−1. Such stored first and second sets are thereafter used when performing digital to analog conversions.
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