发明申请
US20090243712A1 Device for reducing power consumption inside integrated circuit 审中-公开
用于降低集成电路内功耗的装置

Device for reducing power consumption inside integrated circuit
摘要:
The present invention discloses a device for reducing power consumption inside an integrated circuit (IC), comprising: an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor; and a resistor located outside the IC, the resistor having one end electrically connected with a node between the up-gate transistor and the low-gate transistor, or electrically connected with an upper end of the up-gate transistor.
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