Invention Application
US20090032802A1 MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD
有权
MOSFET器件特征超级障碍层和方法
- Patent Title: MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD
- Patent Title (中): MOSFET器件特征超级障碍层和方法
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Application No.: US11831394Application Date: 2007-07-31
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Publication No.: US20090032802A1Publication Date: 2009-02-05
- Inventor: Ravindranath Droopad , Matthias Passlack , Karthik Rajagopalan
- Applicant: Ravindranath Droopad , Matthias Passlack , Karthik Rajagopalan
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L21/336

Abstract:
A method of forming a semiconductor structure comprises forming a channel layer; forming a superlattice barrier layer overlying the channel layer, and forming a gate dielectric overlying the superlattice barrier layer. The superlattice barrier layer includes a plurality of alternating first and second layers of barrier material. In addition, the superlattice barrier layer is configured for increasing a transconductance of the semiconductor device by at least a factor of three over a semiconductor device absent such superlattice barrier layer.
Public/Granted literature
- US07799647B2 MOSFET device featuring a superlattice barrier layer and method Public/Granted day:2010-09-21
Information query
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