发明申请
- 专利标题: Module and architecture for generating real-time, multiple-resolution video streams and the architecture thereof
- 专利标题(中): 用于生成实时,多分辨率视频流及其架构的模块和架构
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申请号: US11976556申请日: 2007-10-25
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公开(公告)号: US20080282304A1公开(公告)日: 2008-11-13
- 发明人: Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
- 申请人: Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
- 专利权人: Vivotek Inc.
- 当前专利权人: Vivotek Inc.
- 优先权: TW096116046 20070507
- 主分类号: H04N7/173
- IPC分类号: H04N7/173
摘要:
A module for generating real-time, multiple-resolution video streams and the architecture thereof are disclosed. A module for generating multiple-resolution video streams as well as the architecture thereof for use with a video encoder includes a system bus, an external memory and a main processor. The main processor and the external memory are coupled to the system bus. The main processor includes a microprocessor, a main arithmetic unit and a secondary arithmetic unit. By applying the present invention, a less time-consuming arithmetic module can synchronously perform together with a more time-consuming arithmetic module, thereby reducing idle time and increasing hardware efficiency and parallelism.
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