Invention Application
- Patent Title: METHOD OF MANUFACTURE OF AN APPARATUS FOR INCREASING STABILITY OF MOS MEMORY CELLS
- Patent Title (中): 制造MOS器件稳定性的方法
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Application No.: US12109327Application Date: 2008-04-24
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Publication No.: US20080233685A1Publication Date: 2008-09-25
- Inventor: Ashok Kumar KAPOOR
- Applicant: Ashok Kumar KAPOOR
- Main IPC: H01L21/8239
- IPC: H01L21/8239

Abstract:
In deep submicron memory arrays there is noted a relatively steady on current value and, therefore, threshold values of the transistors comprising the memory cell are reduced. This, in turn, results in an increase in the leakage current of the memory cell. With the use of an ever increasing number of memory cells leakage current must be controlled. A method of manufacture of a dynamic threshold voltage control scheme implemented with no more than minor changes to the existing MOS process technology is disclosed. The disclosed invention controls the threshold voltage of MOS transistors. Methods for enhancing the impact of the dynamic threshold control technology using this apparatus are also included. The invention is particularly useful for SRAM, DRAM, and NVM devices.
Public/Granted literature
- US07691702B2 Method of manufacture of an apparatus for increasing stability of MOS memory cells Public/Granted day:2010-04-06
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