发明申请
US20080230516A1 Method for forming fine patterns using etching slope of hard mask layer in semiconductor device
失效
使用半导体器件中的硬掩模层的蚀刻斜面形成精细图案的方法
- 专利标题: Method for forming fine patterns using etching slope of hard mask layer in semiconductor device
- 专利标题(中): 使用半导体器件中的硬掩模层的蚀刻斜面形成精细图案的方法
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申请号: US12001127申请日: 2007-12-10
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公开(公告)号: US20080230516A1公开(公告)日: 2008-09-25
- 发明人: Sung-Yoon Cho , Hye-Ran Kang
- 申请人: Sung-Yoon Cho , Hye-Ran Kang
- 专利权人: Hynix Semiconductor Inc.
- 当前专利权人: Hynix Semiconductor Inc.
- 优先权: KR2007-0026515 20070319
- 主分类号: C23F1/04
- IPC分类号: C23F1/04
摘要:
A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer and a second hard mask layer over an etch target layer, forming second hard mask patterns by etching the second hard mask layer, wherein an etching profile of the second hard mask layer has a positive slope, and etching the first hard mask layer and the etch target layer using the second hard mask patterns as an etch mask.
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