Invention Application
US20080157405A1 CHIP STACK WITH PRECISION ALIGNMENT, HIGH YIELD ASSEMBLY AND THERMAL CONDUCTIVITY
审中-公开
具有精密对准的芯片堆叠，高导线组件和热导率
- Patent Title: CHIP STACK WITH PRECISION ALIGNMENT, HIGH YIELD ASSEMBLY AND THERMAL CONDUCTIVITY
- Patent Title (中): 具有精密对准的芯片堆叠，高导线组件和热导率
-
Application No.: US11619265Application Date: 2007-01-03
-
Publication No.: US20080157405A1Publication Date: 2008-07-03
- Inventor: John U. Knickerbocker
- Applicant: John U. Knickerbocker
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/50
Abstract:
A method for fabricating a device adapted for precision aligning integrated circuits having small-scale architecture in a stack, the method includes obtaining dimensions of the integrated circuits; fabricating a precision guide using the dimensions; and fabricating alignment fiducials into at least one of the precision guide and a carrier wafer. A method for placing integrated circuits having small-scale architecture into a stack, the method includes selecting a device adapted for precision aligning the integrated circuits into the stack and precision aligning the integrated circuits into the stack.
Information query
IPC分类:
