发明申请
US20070152281A1 NARROW WIDTH METAL OXIDE SEMICONDUCTOR TRANSISTOR HAVING A SUPPLEMENTAL GATE CONDUCTOR PATTERN 审中-公开
具有补充栅极导体图案的纳米宽金属氧化物半导体晶体管

  • 专利标题: NARROW WIDTH METAL OXIDE SEMICONDUCTOR TRANSISTOR HAVING A SUPPLEMENTAL GATE CONDUCTOR PATTERN
  • 专利标题(中): 具有补充栅极导体图案的纳米宽金属氧化物半导体晶体管
  • 申请号: US11616255
    申请日: 2006-12-26
  • 公开(公告)号: US20070152281A1
    公开(公告)日: 2007-07-05
  • 发明人: Jung Ho Ahn
  • 申请人: Jung Ho Ahn
  • 优先权: KR10-2005-0134091 20051229
  • 主分类号: H01L29/76
  • IPC分类号: H01L29/76
NARROW WIDTH METAL OXIDE SEMICONDUCTOR TRANSISTOR HAVING A SUPPLEMENTAL GATE CONDUCTOR PATTERN
摘要:
A MOS transistor may include at least one of: a channel having a width W0 and a length L0; an active area with a channel between a source area and a drain area; a gate insulating layer formed over a channel; and/or a gate conductor formed over a gate insulating layer and intersecting the active area. In embodiments, a gate conductor may include at least one of: a connection pattern formed with a gate contact hole which electrically connects the gate conductor to the outside; an additional pattern connected to a connection pattern and positioned in parallel with both source and drain areas while being spaced apart from the active area at a certain distance; and a channel pattern connected to an additional pattern in the shape of a T and defining the length of a channel.
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