Invention Application
US20060261036A1 Method for patterning on a wafer having at least one substrate for the realization of an integrated circuit
审中-公开
在具有用于实现集成电路的至少一个衬底的晶片上进行图案化的方法
- Patent Title: Method for patterning on a wafer having at least one substrate for the realization of an integrated circuit
- Patent Title (中): 在具有用于实现集成电路的至少一个衬底的晶片上进行图案化的方法
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Application No.: US11401113Application Date: 2006-04-10
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Publication No.: US20060261036A1Publication Date: 2006-11-23
- Inventor: Giuseppe Fazio , Alessandro Spandre , Pietro Petruzza
- Applicant: Giuseppe Fazio , Alessandro Spandre , Pietro Petruzza
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Priority: EP05425206.9 20050411
- Main IPC: G01L21/30
- IPC: G01L21/30 ; H01L21/302 ; C23F1/00 ; B44C1/22
Abstract:
A method is provided for patterning a wafer comprising at least one substrate for the manufacture of an integrated circuit. The method comprises: etching at least one portion of the substrate with a reactive gas plasma to obtain an optical emission signal, resulting from the products of the reaction between the plasma and the substrate and having a predetermined spectral fingerprint; carrying on the etching of the substrate up to a predetermined end point; and monitoring the spectral fingerprint of the optical emission signal to detect the etching end point. The method comprises the further insertion of an inert gas in the plasma to obtain an increase in the intensity of the optical emission signal.
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