Invention Application
- Patent Title: Non-volatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
-
Application No.: US11104599Application Date: 2005-04-13
-
Publication No.: US20050237829A1Publication Date: 2005-10-27
- Inventor: Hiroshi Nakamura , Tomoharu Tanaka
- Applicant: Hiroshi Nakamura , Tomoharu Tanaka
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Priority: JP2004-120368 20040415; JP2005-013063 20050120
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C7/00 ; G11C16/02 ; G11C16/04 ; G11C16/10 ; G11C16/30

Abstract:
A non-volatile semiconductor memory device comprises a memory cell array of data-rewritable non-volatile memory cells or memory cell units containing the memory cells, and a plurality of word lines each commonly connected to the memory cells on the same row in the memory cell array. In write pulse applying during data writing, a high voltage for writing is applied to a selected word line, and an intermediate voltage for writing is applied to at least two of non-selected word lines. The beginning of charging a first word line located between the selected word line and a source line to a first intermediate voltage for writing is followed by the beginning of charging a second word line located between the selected word line and a bit line contact to a second intermediate voltage for writing.
Public/Granted literature
Information query