发明申请
US20050166167A1 System and method for modeling, abstraction, and analysis of software 有权
用于软件建模,抽象和分析的系统和方法

System and method for modeling, abstraction, and analysis of software
摘要:
A system and method is disclosed for formal verification of software programs that advantageously translates the software, which can have bounded recursion, into a Boolean representation comprised of basic blocks and which applies SAT-based model checking to the Boolean representation.
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