Invention Application
- Patent Title: Signal compensation circuit and demodulating circuit with high-speed and low-speed feedback loops
- Patent Title (中): 信号补偿电路和具有高速和低速反馈回路的解调电路
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Application No.: US10061302Application Date: 2002-02-04
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Publication No.: US20020130698A1Publication Date: 2002-09-19
- Inventor: Akira Yoshida , Akira Horikawa , Shuichi Matsumoto
- Priority: JP2001-071381 20010314
- Main IPC: G06G007/12
- IPC: G06G007/12

Abstract:
A signal compensation circuit compensates for direct-current offset of an input signal by amplifying the input signal with an amplifier having a variable direct-current offset. A low-speed negative feedback loop charges and discharges a capacitor in an integrating circuit according to the direct-current component of the amplified signal. A high-speed negative feedback loop charges and discharges the same capacitor at a faster rate when the amplified signal goes outside an allowable amplitude range. The capacitor potential is used to control the direct-current offset of the amplifier. The allowable amplitude range is adjusted according to the amplitude of the amplified signal. High-speed compensation can thus be combined with a tolerance for runs of identical code levels in the input signal.
Public/Granted literature
- US07035349B2 Signal compensation circuit and demodulating circuit with high-speed and low-speed feedback loops Public/Granted day:2006-04-25
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