Invention Grant
- Patent Title: Multi-gate semiconductor structure and method of manufacturing the same
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Application No.: US17132293Application Date: 2020-12-23
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Publication No.: US12107162B2Publication Date: 2024-10-01
- Inventor: Hung-Yu Wei , Pei-Hsiu Peng , Kai Jen
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee Address: TW Taichung
- Agency: MUNCY, GEISSLER, OLDS & LOWE, P.C.
- Priority: TW 9104860 2020.02.15
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/77 ; H01L21/8234 ; H01L21/8238 ; H01L29/417 ; H01L29/66 ; H01L21/84 ; H01L27/088

Abstract:
A multi-gate semiconductor structure and its manufacturing method are provided. The semiconductor structure includes a substrate having an active area and an isolation structure adjacent to the active area. The semiconductor structure includes a gate structure formed on the substrate and a gate dielectric layer between the gate structure and the substrate. The gate structure includes a first part above the top surface of the substrate and a second part connected to the first part. The second part of the gate structure is formed in the isolation structure, wherein the isolation structure is in direct contact with the bottom surface and sidewalls of the second part of the gate structure. A method of manufacturing the semiconductor structure includes partially etching the isolation structure to form a trench exposing the top portion of sidewalls of the substrate. The gate dielectric layer and the gate structure extend into the trench.
Public/Granted literature
- US20210257491A1 MULTI-GATE SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2021-08-19
Information query
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