- Patent Title: Dynamic compression for multiprocessor platforms and interconnects
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Application No.: US17802117Application Date: 2020-03-30
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Publication No.: US12026106B2Publication Date: 2024-07-02
- Inventor: Keqiang Wu , Zhidong Yu , Cheng Xu , Samuel Ortiz , Weiting Chen
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: KDW Firm PLLC
- International Application: PCT/CN2020/081995 2020.03.30
- International Announcement: WO2021/195825A 2021.10.07
- Date entered country: 2022-08-24
- Main IPC: G06F13/38
- IPC: G06F13/38 ; G06F13/16 ; G06F13/40

Abstract:
The present disclosure provides an interconnect for a non-uniform memory architecture platform to provide remote access where data can dynamically and adaptively be compressed and decompressed at the interconnect link. A requesting interconnect link can add a delay to before transmitting requested data onto an interconnect bus, compress the data before transmission, or packetize and compress data before transmission. Likewise, a remote interconnect link can decompress request data.
Public/Granted literature
- US20230085201A1 DYNAMIC COMPRESSION FOR MULTIPROCESSOR PLATFORMS AND INTERCONNECTS Public/Granted day:2023-03-16
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