Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US17749218Application Date: 2022-05-20
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Publication No.: US11942408B2Publication Date: 2024-03-26
- Inventor: Shuo-Mao Chen , Feng-Cheng Hsu , Shin-Puu Jeng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT LAW
- Agent Anthony King
- The original application number of the division: US15851174 2017.12.21
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L21/683 ; H01L25/18 ; H01L23/14 ; H01L23/31 ; H01L23/538
Abstract:
A method includes: bonding a plurality of interposer dies to a first redistribution layer (RDL), each of the interposer dies comprising a substrate and a second RDL below the substrate; encapsulating the first RDL and the interposer dies; reducing a thickness of the substrate of each of the interposer dies; and electrically coupling the interposer dies to a first semiconductor die.
Public/Granted literature
- US20220278034A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-09-01
Information query
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