- 专利标题: Enabling a multi-chip daisy chain topology using peripheral component interconnect express (PCIe)
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申请号: US17564975申请日: 2021-12-29
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公开(公告)号: US11714776B2公开(公告)日: 2023-08-01
- 发明人: Kishon Vijay Abraham Israel Vijayponraj , Sriramakrishnan Govindarajan , Mihir Narendra Mody
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 申请人地址: US TX Dallas
- 专利权人: Texas Instmments Incorporated
- 当前专利权人: Texas Instmments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Brian D. Graham; Frank D. Cimino
- 优先权: IN 2141035280 2021.08.05
- 主分类号: G06F13/42
- IPC分类号: G06F13/42 ; G06F9/4401 ; G06F13/40 ; G06F12/1027
摘要:
A system-on-chip (SoC) may be configured to enable a Multi-Chip Daisy Chain Topology using peripheral component interface express (PCIe). The SoC may include a processor, a local memory, a root complex operably connected to the processor and the local memory, and a multi-function endpoint controller. The root complex may obtain forwarding information to configure routing of transactions to one or more PCIe endpoint functions or to the local memory. The root complex may initialize, based on the forwarding information, access between a host and the one or more PCIe endpoint functions. The multi-function endpoint controller may obtain a descriptor and endpoint information to configure outbound portals for transactions to at least one remote host. The multi-function endpoint controller may establish a communication path between the host and a function out of a plurality of functions.
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