Digital to analog converter generates an analog output corresponding to a digital input by controlling DAC cells using bits of the digital input. The DAC cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the DAC cells may have duty cycle error or mismatches. To compensate for the duty cycle error of a DAC cell, a small amount of charge is injected into a low-impedance node of a DAC cell when the data signal driving the DAC cell transitions, or changes state. The small amount of charge is generated using a capacitive T-network, and the polarity of the charge injected is opposite of the error charge caused by duty cycle error. The opposite amount of charge thus compensates or cancels out the duty cycle error, and duty cycle error present at the output of the DAC cell is reduced.