Invention Grant
- Patent Title: Method for manufacturing semiconductor package structure
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Application No.: US16859037Application Date: 2020-04-27
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Publication No.: US11532569B2Publication Date: 2022-12-20
- Inventor: Jui-Pin Hung , Feng-Cheng Hsu , Shuo-Mao Chen , Shin-Puu Jeng , De-Dui Marvin Liao
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WAPT
- Agent Anthony King
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L21/56 ; H01L21/78 ; H01L23/31 ; H01L23/498 ; H01L25/10 ; H01L25/00 ; H01L23/538 ; H01L25/03 ; H01L21/683 ; G06F16/435 ; G06F16/9535 ; G06F16/24 ; G06Q50/00 ; H01L25/16 ; H01L25/18 ; G06Q99/00

Abstract:
A semiconductor package structure includes a first redistribution layer, a second redistribution layer and an interconnecting structure. The first redistribution layer has a first surface and a second surface opposite to each other. The second redistribution layer is disposed over the first surface of the first redistribution layer, wherein the second redistribution layer has a third surface and a fourth surface opposite to each other, and the third surface facing the first surface. The interconnecting structure is disposed between and electrically connected to the first redistribution layer and the second redistribution layer, wherein the interconnecting structure comprises a conductive post and a conductive bump stacked to each other.
Public/Granted literature
- US20200258849A1 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2020-08-13
Information query
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