- 专利标题: Package-on-package structure
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申请号: US16934394申请日: 2020-07-21
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公开(公告)号: US11532498B2公开(公告)日: 2022-12-20
- 发明人: Chih-Wei Lin , Hui-Min Huang , Ai-Tee Ang , Yu-Peng Tsai , Ming-Da Cheng , Chung-Shi Liu
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Slater Matsil, LLP
- 主分类号: H01L21/683
- IPC分类号: H01L21/683 ; H01L23/498 ; H01L23/00 ; H01L25/00 ; H01L23/31 ; H01L25/10 ; H01L21/56 ; H01L25/065
摘要:
A method comprises forming a plurality of interconnect structures including a dielectric layer, a metal line and a redistribution line over a carrier, attaching a semiconductor die on a first side of the plurality of interconnect structures, forming an underfill layer between the semiconductor die and the plurality of interconnect structures, mounting a top package on the first side the plurality of interconnect structures, wherein the top package comprises a plurality of conductive bumps, forming an encapsulation layer over the first side of the plurality of interconnect structures, wherein the top package is embedded in the encapsulation layer, detaching the carrier from the plurality of interconnect structures and mounting a plurality of bumps on a second side of the plurality of interconnect structures.
公开/授权文献
- US20200350197A1 Package-on-Package Structure 公开/授权日:2020-11-05
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