- 专利标题: Managing error-handling flows in memory devices
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申请号: US17205091申请日: 2021-03-18
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公开(公告)号: US11532373B2公开(公告)日: 2022-12-20
- 发明人: Kishore Kumar Muchherla , Shane Nowell , Mustafa N. Kaynak , Sampath K. Ratnam , Peter Feeley , Sivagnanam Parthasarathy , Devin M. Batutis , Xiangang Luo
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Lowenstein Sandler LLP
- 主分类号: G11C29/42
- IPC分类号: G11C29/42 ; G11C16/26 ; G11C29/44 ; G11C16/10 ; G11C29/12
摘要:
Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a block of the memory device, wherein the block is associated with a voltage offset bin, determining an order of a plurality of error-handling operations to be performed to recovery data associated with the read error, wherein the order is specified in a metadata table and is based on the voltage offset bin associated with the block, and performing at least one error-handling operation of the plurality of error-handling operations in the order specified by the metadata table.
公开/授权文献
- US20220301652A1 MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES 公开/授权日:2022-09-22
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