A display module includes a display panel, a source driving circuit, and a timing control circuit. The display panel includes a plurality of sub-pixels, at least one sense signal line, and at least one reference sense signal line. Each sub-pixel includes a pixel driving circuit including a driving transistor. The source driving circuit includes at least one analog-to-digital conversion sub-circuit. Two input terminals of an analog-to-digital conversion sub-circuit in the at least one analog-to-digital conversion sub-circuit are respectively coupled to at least one sense signal line and one reference sense signal line. The analog-to-digital conversion sub-circuit is configured to receive a sense voltage signal from the sense signal line and a reference voltage signal from the reference sense signal line, to obtain a sensing digital signal in accordance with a voltage difference between the sense voltage signals and the reference voltage signal, and to output the sensing digital signal.