- 专利标题: Isolation regions for reduced junction leakage
-
申请号: US16855914申请日: 2020-04-22
-
公开(公告)号: US11264456B2公开(公告)日: 2022-03-01
- 发明人: Gulbagh Singh , Hsin-Chi Chen , Kun-Tsang Chuang
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- 主分类号: H01L29/06
- IPC分类号: H01L29/06 ; H01L21/762 ; H01L21/8234 ; H01L21/306 ; H01L21/02 ; H01L21/768
摘要:
The present disclosure describes a fabrication method that prevents divots during the formation of isolation regions in integrated circuit fabrication. In some embodiments, the method of forming the isolation regions includes depositing a protective layer over a semiconductor layer; patterning the protective layer to expose areas of the semiconductor layer; depositing an oxide on the exposed areas the semiconductor layer and between portions of the patterned protective layer; etching a portion of the patterned protective layer to expose the semiconductor layer; etching the exposed semiconductor layer to form isolation openings in the semiconductor layer; and filling the isolation openings with a dielectric to form the isolation regions.
公开/授权文献
- US20200251554A1 ISOLATION REGIONS FOR REDUCED JUNCTION LEAKAGE 公开/授权日:2020-08-06
信息查询
IPC分类: