- 专利标题: External memory based translation lookaside buffer
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申请号: US16141603申请日: 2018-09-25
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公开(公告)号: US11243891B2公开(公告)日: 2022-02-08
- 发明人: Nippon Harshadk Raval , Philip Ng
- 申请人: ATI Technologies ULC
- 申请人地址: CA Markham
- 专利权人: ATI Technologies ULC
- 当前专利权人: ATI Technologies ULC
- 当前专利权人地址: CA Markham
- 代理机构: Volpe Koenig
- 主分类号: G06F12/00
- IPC分类号: G06F12/00 ; G06F12/1045
摘要:
Methods, devices, and systems for virtual address translation. A memory management unit (MMU) receives a request to translate a virtual memory address to a physical memory address and searching a translation lookaside buffer (TLB) for a translation to the physical memory address based on the virtual memory address. If the translation is not found in the TLB, the MMU searches an external memory translation lookaside buffer (EMTLB) for the physical memory address and performs a page table walk, using a page table walker (PTW), to retrieve the translation. If the translation is found in the EMTLB, the MMU aborts the page table walk and returns the physical memory address. If the translation is not found in the TLB and not found in the EMTLB, the MMU returns the physical memory address based on the page table walk.
公开/授权文献
- US20200097413A1 EXTERNAL MEMORY BASED TRANSLATION LOOKASIDE BUFFER 公开/授权日:2020-03-26
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