Invention Grant
- Patent Title: Stacked semiconductor package assemblies including double sided redistribution layers
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Application No.: US15721257Application Date: 2017-09-29
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Publication No.: US10886263B2Publication Date: 2021-01-05
- Inventor: William T. Chen , John Richard Hunt , Chih-Pin Hung , Chen-Chao Wang , Chih-Yi Huang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L25/10
- IPC: H01L25/10 ; H01L23/538 ; H01L23/31 ; H01L23/367 ; H01L21/48 ; H01L21/56 ; H01L21/683 ; H01L23/00 ; H01L25/00 ; H01L25/16 ; H01L25/18 ; H01L23/13 ; H01L25/07 ; H01L25/075 ; H01L25/11 ; H01L25/04 ; H01L25/065
Abstract:
A semiconductor device package comprises a bottom electronic device, an interposer module, a top electronic device, and a double sided redistribution layer (RDL) structure. The interposer module includes a plurality of conductive vias. The top electronic device has an active surface and is disposed above the bottom electronic device and above the interposer module. The double sided RDL structure is disposed between the bottom electronic device and the top electronic device. The active surface of the bottom electronic device faces toward the double sided RDL structure. The active surface of the top electronic device faces toward the double sided RDL structure. The double sided RDL structure electrically connects the active surface of the bottom electronic device to the active surface of the top electronic device. The double sided RDL structure electrically connects the active surface of the top electronic device to the interposer module.
Public/Granted literature
- US20190103386A1 STACKED SEMICONDUCTOR PACKAGE ASSEMBLIES INCLUDING DOUBLE SIDED REDISTRIBUTION LAYERS Public/Granted day:2019-04-04
Information query
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