- 专利标题: Adaptive time-to-digital converter and method
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申请号: US16600794申请日: 2019-10-14
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公开(公告)号: US10809669B2公开(公告)日: 2020-10-20
- 发明人: Gil Horovitz , Aryeh Farber , Nisim Machluf , Evgeny Shumaker , Igal Kushnir
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schiff Hardin LLP
- 主分类号: G04F10/00
- IPC分类号: G04F10/00 ; H03L7/083 ; H03L7/095 ; H03L7/08
摘要:
Systems, methods, and circuitries are disclosed for controlling an adaptive time-to-digital converter (TDC) that determines a phase difference between a reference signal and a phase locked loop (PLL) feedback signal. Adaptive TDC circuitry includes a chain of n delay elements each characterized by a delay. Gate circuitry generates a gated PLL feedback signal while a gating enable signal has an enable value. N sampling elements, each associated with a delay element, are enabled by the reference signal arriving at the input of the associated delay element to store a value of the gated PLL feedback signal. Adaptive gating circuitry is configured to generate the gating enable signal based on the delay and a period of the PLL feedback signal. A supply voltage for the delay elements may be controlled to cause the delay elements to exhibit a desired delay.
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