发明授权
- 专利标题: Analyzing delay variations and transition time variations for electronic circuits
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申请号: US16293313申请日: 2019-03-05
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公开(公告)号: US10783301B2公开(公告)日: 2020-09-22
- 发明人: Duc Huynh , Jiayong Le , Ayhan Mutlu , Peivand Tehrani
- 申请人: Synopsys, Inc.
- 申请人地址: US CA Mountain View
- 专利权人: Synopsys, Inc.
- 当前专利权人: Synopsys, Inc.
- 当前专利权人地址: US CA Mountain View
- 代理机构: Fenwick & West LLP
- 主分类号: G06F30/3312
- IPC分类号: G06F30/3312 ; G06F111/08 ; G06F119/12
摘要:
A system receives a circuit description and measures of intrinsic delay, intrinsic delay variation, transition time and transition time variation for each stage and determines stage delay variation of each stage. The system receives a circuit description and derate factors and determines an intrinsic delay standard deviation and a correlation coefficient. The system determines a stage delay variation of each stage based on the determined factors. The system receives parameters describing an asymmetric distribution of delay values and generates a normal distribution of delay values. The system receives measures of nominal transition time at an output and input of a wire, and transition time variation at the input of the wire and determines a transition time variation at the output of the wire. The system receives measures of an Elmore delay and a nominal delay of the wire and determines a delay variation at the output of the wire.
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