Invention Grant
- Patent Title: System and method for electrical testing of through silicon vias (TSVs)
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Application No.: US15841585Application Date: 2017-12-14
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Publication No.: US10775426B2Publication Date: 2020-09-15
- Inventor: Alberto Pagani
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Crowe & Dunlevy
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@7818686a
- Main IPC: G01R31/26
- IPC: G01R31/26 ; H01L21/66 ; H01L21/768 ; G01R31/27 ; H01L23/48 ; G01R31/28

Abstract:
A testing system for carrying out electrical testing of at least one first through via forms an insulated via structure extending only part way through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the insulated via structure. The first electrical test circuit enables detection of at least one electrical parameter of the insulated via structure.
Public/Granted literature
- US20180106854A1 SYSTEM AND METHOD FOR ELECTRICAL TESTING OF THROUGH SILICON VIAS (TSVS) Public/Granted day:2018-04-19
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