Invention Grant
- Patent Title: System, apparatus and method for optimized throttling of a processor
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Application No.: US15969198Application Date: 2018-05-02
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Publication No.: US10739844B2Publication Date: 2020-08-11
- Inventor: Chee Lim Nge , James G. Hermerding, II , Pronay Dutta , Joshua Resch
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/3296 ; G06F9/48 ; G06F1/3206 ; G06F1/324 ; G06F1/3234 ; G06F1/26 ; G06F9/50 ; G06F1/30 ; G06F1/329 ; G06F1/3212

Abstract:
In one embodiment, a processor includes: a plurality of processing elements to perform operations; a power management agent (PMA) coupled to the plurality of processing elements to control power consumption of the plurality of processing elements; and a throttling circuit coupled to the PMA. The throttling circuit is to determine a throttling power level for the plurality of processing elements based at least in part on translation information communicated from the PMA. Other embodiments are described and claimed.
Public/Granted literature
- US20190041969A1 System, Apparatus And Method For Optimized Throttling Of A Processor Public/Granted day:2019-02-07
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