- 专利标题: Reducing backside deposition at wafer edge
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申请号: US14578126申请日: 2014-12-19
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公开(公告)号: US10648079B2公开(公告)日: 2020-05-12
- 发明人: Chloe Baldasseroni , Andrew Duvall , Ryan Blaquiere , Shankar Swaminathan
- 申请人: Lam Research Corporation
- 申请人地址: US CA Fremont
- 专利权人: Lam Research Corporation
- 当前专利权人: Lam Research Corporation
- 当前专利权人地址: US CA Fremont
- 代理机构: Penilla IP, APC
- 主分类号: H01L21/687
- IPC分类号: H01L21/687 ; H01L21/683 ; C23C16/458 ; C23C14/50 ; H01J37/32
摘要:
A process chamber for depositing a film on a wafer is provided, including: a pedestal having, a central top surface having a plurality of wafer supports configured to support the wafer at a support level above the central top surface, an annular surface at a step down from the central top surface; a carrier ring configured to be supported by carrier ring supports such that a bottom surface of the carrier ring is at a first vertical separation above the annular surface, the carrier ring having a step down surface defined relative to a top surface; wherein when the carrier ring is seated on the carrier ring supports, then the step down surface of the carrier ring is positioned at a process level that is at a second vertical separation from the support level over the top surface of the pedestal.
公开/授权文献
- US20160177444A1 REDUCING BACKSIDE DEPOSITION AT WAFER EDGE 公开/授权日:2016-06-23
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