A display includes a substrate having a driver circuit with hybrid devices. The driver circuit includes first to fourth transistors. The first transistor includes a first control end connected to a clock signal, a first end connected to a high voltage, and a second end connected to a first node. The second transistor comprises metal oxide semiconductor, and includes a second control end connected to an input signal, a third end connected to a second node, and a fourth end connected to the first node. The third transistor comprises polysilicon semiconductor, and includes a third control end connected to the first node, and a fifth end connected to the high voltage, and a sixth end connected to an output voltage. The fourth transistor includes a fourth control end connected to the input signal, a seventh end connected to the third node, and an eighth end connected to the output voltage.