- 专利标题: Non-volatile memory aware caching policies
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申请号: US16015880申请日: 2018-06-22
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公开(公告)号: US10534710B2公开(公告)日: 2020-01-14
- 发明人: Kshitij Doshi , Bhanu Shankar
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: INTEL CORPORATION
- 当前专利权人: INTEL CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 主分类号: G06F12/0897
- IPC分类号: G06F12/0897 ; G06F12/0804 ; G06F12/084 ; G06F12/126 ; G06F12/0868 ; G06F12/0873
摘要:
In embodiments, an apparatus may include a CC, and a LLC coupled to the CC, the CC to reserve a defined portion of the LLC where data objects whose home location is in a NVM are given placement priority. In embodiments, the apparatus may be further coupled to at least one lower level cache and a second LLC, wherein the CC may further identify modified data objects in the at least one lower level cache whose home location is in a second NVM, and in response to the identification, cause the modified data objects to be written from the lower level cache to the second LLC, the second LLC located in a same socket as the second NVM.
公开/授权文献
- US10496536B2 Non-volatile memory aware caching policies 公开/授权日:2019-12-03
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