Invention Grant
- Patent Title: Integrated circuit and manufacturing method thereof
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Application No.: US14056725Application Date: 2013-10-17
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Publication No.: US10515949B2Publication Date: 2019-12-24
- Inventor: Shao-Yu Chen , Chih-Ping Chao , Chun-Hung Chen , Chung-Long Chang , Kuan-Chi Tsai , Wei-Kung Tsai , Hsiang-Chi Chen , Ching-Chung Hsu , Cheng-Chang Hsu , Yi-Sin Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L27/07
- IPC: H01L27/07 ; H01L49/02

Abstract:
An integrated circuit includes a stacked MIM capacitor and a thin film resistor and methods of fabricating the same are disclosed. A capacitor bottom metal in one capacitor of the stacked MIM capacitor and the thin film resistor are substantially at the same layer of the integrated circuit, and the capacitor bottom metal and the thin film resistor are also made of substantially the same materials. The integrated circuit with both of a stacked MIM capacitor and a thin film resistor can be made in a cost benefit way accordingly, so as to overcome disadvantages mentioned above.
Public/Granted literature
- US20150108607A1 INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF Public/Granted day:2015-04-23
Information query
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