- 专利标题： Chip on package structure and method
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申请号： US16117449申请日： 2018-08-30
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公开(公告)号： US10510717B2公开(公告)日： 2019-12-17
- 发明人: Chen-Hua Yu , Der-Chyang Yeh , Kuo-Chung Yee , Jui-Pin Hung
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L25/065
- IPC分类号： H01L25/065 ; H01L21/48 ; H01L23/00 ; H01L21/56 ; H01L21/683 ; H01L25/10 ; H01L25/00 ; H01L23/498 ; H01L23/538 ; H01L21/78 ; H01L23/31 ; H01L23/48 ; H01L21/027 ; H01L21/288 ; H01L21/321 ; H01L21/768 ; H01L21/66
摘要：
A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die.
公开/授权文献
- US20180374822A1 Chip on Package Structure and Method 公开/授权日：2018-12-27
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