- 专利标题: System and method for calibrating pulse width and delay
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申请号: US15636387申请日: 2017-06-28
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公开(公告)号: US10418981B2公开(公告)日: 2019-09-17
- 发明人: Wing-Fai Loke , Chih-Wei Yao
- 申请人: Samsung Electronics Co., Ltd.
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 代理机构: Lewis Roca Rothgerber Christie LLP
- 主分类号: H03K5/06
- IPC分类号: H03K5/06 ; H02M3/07 ; H03K5/24 ; H03K5/00
摘要:
A system and method for calibrating a duration of a pulse or a delay. A reference clock signal includes a sequence of reference pulses, and controls a switch in a first charge pump that is configured to charge a first capacitor. Each of a sequence of test pulses controls a switch in a second charge pump that is configured to charge a second capacitor. At the end of each charging cycle, the respective capacitor voltages are compared and the duration of the test pulses is adjusted, by a feedback circuit, in a direction tending to make the capacitor voltages equal. When the capacitor voltages are equal, the ratio of the lengths of the reference pulses and test pulses equals the ratio of the capacitances, if the charge pumps deliver the same current when switched on.
公开/授权文献
- US20180302069A1 SYSTEM AND METHOD FOR CALIBRATING PULSE WIDTH AND DELAY 公开/授权日:2018-10-18
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