Invention Grant
- Patent Title: Testing system, method for testing an integrated circuit and a circuit board including the same
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Application No.: US15183253Application Date: 2016-06-15
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Publication No.: US10408875B2Publication Date: 2019-09-10
- Inventor: Yu-Jung Chang , Wei-Kai Liao , Ming-Ching Lin , Kuei-Hao Tseng
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/26 ; G01R31/28

Abstract:
A testing system includes a subtractor and a divider. The subtractor is configured to receive a first voltage of a circuit being tested and a second voltage of the circuit, and to derive a difference between the first voltage and the second voltage. The divider is configured to receive the difference between the first voltage and the second voltage, and to derive a resistance of the circuit by dividing (i) the difference between the first voltage and the second voltage by (ii) a difference between a first current applied to the circuit and a second current applied to the circuit. The first voltage is corresponding to the first current, and the second voltage is corresponding to the second current.
Public/Granted literature
- US20170363682A1 TESTING SYSTEM, METHOD FOR TESTING AN INTEGRATED CIRCUIT AND A CIRCUIT BOARD INCLUDING THE SAME Public/Granted day:2017-12-21
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