Invention Grant
- Patent Title: Semiconductor package and manufacturing method of the same
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Application No.: US15370865Application Date: 2016-12-06
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Publication No.: US10050024B2Publication Date: 2018-08-14
- Inventor: Jui-Pin Hung , Feng-Cheng Hsu , Shuo-Mao Chen , Shin-Puu Jeng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/10 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L23/538 ; H01L25/00

Abstract:
The present disclosure provides a semiconductor package, including a first layer, a second layer, and a conductive array. The first layer includes a packaged die having a carrier surface and a molding surface, and a first die structure in proximity to the carrier surface. An active region of the first die structure is electrically coupled to the packaged die through a solder. The second layer includes a second die structure, the second die structure being connected to the active region of the first die structure by a first redistributed layer (RDL). The conductive array is connected to an active region of the second die structure by a second RDL. The present disclosure also provides a method for manufacturing the aforesaid semiconductor package.
Public/Granted literature
- US20170365587A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2017-12-21
Information query
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