The utility model provides a data processor. The data processor comprises a Booth encoding circuit, a first partial product acquisition circuit, a second partial product acquisition circuit, a first compression circuit and a second compression circuit. The output end of the Booth encoding circuit is connected with the first input end of the first partial product acquisition circuit; the first input end of the second partial product acquisition circuit is connected; the output end of the first partial product obtaining circuit is connected with the first input end of the first compression circuit, the output end of the second partial product obtaining circuit is connected with the first input end of the second compression circuit, the data processor can achieve multiplication and multiply-accumulate operation, and therefore the universality of the data processor is improved. Besides, the data processor does not need to carry out accumulation operation on multiplication operation resultsagain to achieve multiplication and accumulation operation, multiplication operation or multiplication and accumulation operation can be directly achieved only through one operation process, and therefore power consumption of the data processor is reduced.