The invention discloses a delay-locked loop system and an interrelated method used for generating a recovered clock according to an input signal and a reference clock. The method comprises: generating a phase error signal for representing the phase error between the input signal and the recovered clock; generating a first correction signal based on the phase error signal by using an integral difference conversion method; generating a clock index and updating the clock index according to the first correction signal; delaying the reference clock to generate a plurality of delayed versions of the reference clock as a plurality of candidate clocks; and selecting one of the candidate clocks as the recovered clock based on the clock index.