Disclosed is an input port to one or more switching matrices of a network element or the like through a number of backpanel connections, the port receiving input flows in the form of bits arranged inframes, the port comprising: a memory for storing a number of bytes belonging to a tributary; a slicer for slicing the stored bytes in a number of word structures and a backpanel framer for forming backpanel frames with said word structures, the number of said word structures being equal to the number of said switching matrices and the capacity of the input flow being equal to the capacity of theoverall backpanel connection capacity.