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发明授权
CN1514372B 低功率高速缓存及其快速存取数据的方法 有权 复审申请

低功率高速缓存及其快速存取数据的方法
摘要：
一高速缓存由利用直接映像的快速存取并可独立选择的复数个快取区块所组成，且每一区块能够储存复数个高速缓存线并具有复数个输出。此外，高速缓存还包含复数个与每个快取区块相关联的比较逻辑单元，且每个比较逻辑单元具有复数个输入，用以接收相关联快取区块的复数个输出，并将接收到的相关联快取区块的复数个输出与输入至此高速缓存的地址总线中的一值加以比较。最后，此高速缓存包含输出逻辑单元，此输出逻辑单元从与每个快取区块相关联的比较逻辑单元的输出中选择其一做为整个高速缓存的最后输出。
摘要（英）：

The present invention relates to a high speed cache which is composed of multiple fast-take zone blocks which can utilize direct-mapped fast access and can select independently as each zone block can store multiple high speed cache lines with multiple outputs; the high speed cache also comprises multiple comparison logic units correlated to each fast-take zone block as each comparison logic unit has multiple input for receiving multiple outputs of correlated fast-take zone block and to compare received multiple outputs with a value inputted in address bus of high speed cache; it consists of output logic unit finally to select one of outputs in comparison logic unit correlated to each fast-take zone block as the last output of the entire high speed cache.

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