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发明公开
CN108666255A 封装堆叠结构及其制法 无效 - 驳回

封装堆叠结构及其制法
摘要：
一种封装堆叠结构及其制法，用以于设有电子元件的板体上堆叠无核心层(coreless)的线路部，以降低该封装堆叠结构的整体厚度。
摘要（英）：

The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.

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