The invention discloses an in-hole oxygen-free dry etching method for reducing the voltage of an LED chip of a 3D through hole superstructure. The method comprises that an n type doped GaN layer, an InGaN/GaN multi-quantum well layer and a p type doped GaN layer are prepared on an epitaxial substrate. A nanometer Ag-based reflector, reflector protective layer, N MESA holes and an insulating layerare prepared in the surface of an LED epitaxial wafer, and n-pad circular holes are formed; SiO2 in the n-pad circular holes are etched in an oxygen-free drying method, the holes are filled with N metal electrodes, and bonding layer metal is prepared; and an old growth substrate is peeled, an MESA cutting channel, a passivation layer PA, a P electrode pattern and P electrode metal are prepared toform the LED chip. The etching ratio of SiO2 to photoresist is controlled to solve the problem that the voltage of the LED chip of the 3D through hole superstructure is too high. The yield rate of thedriving voltage of the whole LED wafer is improved greatly, and the average of in-wafer voltage can be reduce to a value lower than 3.0V.