The embodiment of the invention relates to a memory device and an operation method thereof. The memory device includes a memory cell, a local bit line, a data line, first and second pass gate circuits, and a sense amplifier. The local bit line is coupled to the memory cell. The first pass gate circuit is coupled to the local bit line and the data line and is configured to couple the local bit lineto the data line. The second pass gate circuit is coupled to the data line and the global bit line and is configured to couple the data line to the global bit line. The sense amplifier is coupled tothe data line.